Can Your ATPG Do This? Cut Defects Escaping Detection With ML


Chipmakers worldwide consider Automatic Test Pattern Generation (ATPG) their go-to method for achieving high test coverage in production. ATPG generates test patterns designed to detect faults in the silicon and ensures they are applied effectively using the chip’s Design-for-Test (DFT) infrastructure. This combination enhances fault detection while optimizing test efficiency. These patter... » read more

The Data Dilemma In Semiconductor Testing And Why It Matters: Part 1


In today’s semiconductor industry, machine learning (ML) is no longer a buzzword — it’s an operational necessity. From optimizing test flows to identifying device drifts and executing advanced analytics like VMIN or trimming, ML-based applications are increasingly used to boost yields, improve quality, and lower test costs. But there’s a catch. To make these intelligent applications ... » read more

E-Beam Inspection Proves Essential For Advanced Nodes


Electron-beam inspection is proving to be indispensable for finding critical defects at sub-5nm dimensions. The challenge now is how to speed up the process to make it economically palatable to fabs. E-beam inspection's notorious sensitivity-throughput tradeoff has made comprehensive defect coverage with e-beam at these advanced nodes especially problematic. For Intel’s 18A logic node (~1.... » read more

Who Is Most Likely To Link Financial And Manufacturing Data?


Experts at the Table: Semiconductor Engineering sat down to discuss which companies have the most to gain from linking financial data with manufacturing data analytics platforms with Dieter Rathei, CEO of DR Yield; Jon Holt, senior director of product management at PDF Solutions, Alex Burlak, vice president of advanced analytics and test at proteanTecs; and Dirk de Vries, technical program ma... » read more

Inference Framework For Deployment Challenges of Large Generative Models On GPUs (Google)


A new technical paper titled "Scaling On-Device GPU Inference for Large Generative Models" was published by researchers at Google and Meta Platforms. Abstract "Driven by the advancements in generative AI, large machine learning models have revolutionized domains such as image processing, audio synthesis, and speech recognition. While server-based deployments remain the locus of peak perform... » read more

New Ways To Improve EDA Productivity


EDA vendors are taking aim at new ways to improve the productivity of design and verification engineers, who are struggling to keep pace with exponential increases in chip complexity in tight time-to-market windows and with constrained engineering talent pipelines. In the past, progress often was as straightforward as improving algorithms or parallelizing computations in a linear flow. But w... » read more

Discovering Digital Twins: A Complete Guide


As artificial intelligence (AI) and machine learning (ML) continue to revolutionize industries, their integration with simulation is amplifying the capabilities of digital twins. AI/ML, simulation, and reduced-order modeling (ROM) technologies combine to create hybrid digital twins—virtual replicas that blend data-driven insights with the accuracy of physics-based models. This powerful approa... » read more

GenAI for Analog IC Design (McMaster University)


A new technical paper titled "Generative AI for Analog Integrated Circuit Design: Methodologies and Applications" was published by researchers at McMaster University. Abstract "Electronic Design Automation (EDA) in analog Integrated Circuits (ICs) has been the focus of extensive research; however, unlike its digital counterpart, it has not achieved widespread adoption. In this systematic re... » read more

The Optical Implementation of Backpropagation (Oxford, Lumai)


A technical paper titled "Training neural networks with end-to-end optical backpropagation" was published by researchers at University of Oxford and Lumai Ltd. Abstract "Optics is an exciting route for the next generation of computing hardware for machine learning, promising several orders of magnitude enhancement in both computational speed and energy efficiency. However, reaching the full... » read more

What Scares Chip Engineers About Generative AI


Experts At The Table: LLMs and other generative AI programs are a long way away from being able to design entire chips on their own from scratch, but the emergence of the tech has still raised some genuine concerns. Semiconductor Engineering sat down with a panel of experts, which included Rod Metcalfe, product management group director at Cadence; Syrus Ziai, vice-president of engineering at E... » read more

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